1. Field of the Invention
The present invention relates to a low power consumption microprocessor comprising a plurality of operating units.
2. Description of the Prior Art
The general trend towards smaller sizes in products using large scale integration (LSI) circuit devices has increased the need to reduce the power consumption of component LSI devices. Various measures have been taken to reduce LSI device power consumption, including both device structure and circuit design innovations, and other innovations have also been applied to microprocessors and microcomputers. For example, in the NS32CG16 microcomputer manufactured by National Semiconductor Corp. of the United States, power consumption is reduced by applying a command to set a suitable value in the internal control register which changes the operating frequency of the microcomputer, as disclosed in National Semiconductor NS32CG16 Technical Design Handbook 1988.
CMOS devices are used for many microprocessors as a means of achieving high integration. Because the power consumption of CMOS devices is approximately proportional to the operating frequency of the device, reducing the clock rate of the microcomputer within the range which will not adversely affect the processing capacity of the device can effectively achieve a low power consumption device. In addition, by using a completely static circuit structure in the CMOS processor, the internal state of the processor can be maintained even if the operating clock is stopped.
A method for reducing power consumption by controlling the operation of an oscillator or stopping the supply of the operating clock to the microcomputer circuits by applying a command is .described in U.S. Pat. Nos. 4,748,559 and 4,758,945. However, because the operating frequency is changed programmatically by these methods, it is not possible to continue executing a conventional program in a processor with a power-saving function. In addition, it is difficult to provide control for precision power reduction.